Ramon Chips CEO Ran Ginosar - Interview

What Is the Background of Ramon Chips’ Top Management?

Ran Ginosar, CEO (PhD, Princeton University, 1982), is a professor of electrical engineering and computer science at the Technion—Israel Institute of Technology. He has researched microelectronics chips and high performance computing architecture for several decades, and has co-founded several startups in that area.

Dov Alon (VP Engineering), BSc and MSc EE (Technion). Was VLSI Design Center Manager at Rafael–Israel Armament Development Authority, responsible for developing 80 ICs for communication and DSP applications. Was President and CEO of IC4IC Inc, a privately held fabless semiconductor company in the 3G wireless infrastructure market. Expert on rad-hard ASIC design.

Tuvia Liran (CTO), BSc and MSc, Physics and EE (Technion). Was product engineering manager, responsible for productization of several high end MPUs at National Semiconductor’s fab in Israel, and managed VLSI design at iSight, a video processor company. Consulted to several companies in Israel on design for manufacturability, analog/mixed-signal design and back-end design methodologies. Expert on rad-hard circuits and physical ASIC / VLSI design.

Fredy Lange (VP R&D), BSc EE (Technion) and MBA (Tel-Aviv). Was Silicon Design manager at Texas Instruments, Analog Devices and National Semiconductors, responsible for developing successful generations of connectivity mixed-signal products (BT, WLAN, GPS, NFC), TigerSHARC DSP, audio sigma-delta codecs, Super I/O and embedded voice/fax products. Expert in circuits, chip design and verification, and in assembling and leading chip design organizations.

Peleg Aviely (Sr. Architect), BSc EE (Ben Gurion). Was CTO and VP R&D of Plurality LTD, a fabless semiconductor company that developed many-core architecture for on-chip parallel computing. Expert on development of parallel embedded system platforms and their parallel programming model

Tsvika Israeli (Director of Software), BSc Math and CS (Tel Aviv). Was Intel's Performance Tools Lab (Israel) department manager, Software Director at Lucid, VP R&D (Data Center Software Products) at Voltaire and VRTX real time OS development lead at Ready Systems. Expert in management of software R&D teams, simulation, run time systems, performance tools and compiler tool-chain.

Roy Nesher (Director of VLSI), BSc EE (Technion) and MBA (Kellog-Recanati). Was R&D manager at TranSwitch responsible for delivering successful ASIC and IPs for high speed mixed signals interfaces (HDMI, DisplayPort, 10/100/1G Ethernet Phy) for consumer electronic and communication markets, Director of VLSI and Software at Ceragon Networks and VLSI leader at PMC-Sierra and Intel. Expert in management of VLSI design teams, ASIC projects and R&D.

Dror Reznik (VLSI Verification Manager), BSc EE (HIT). Was design verification engineer at Metalink, DV and CAD lead at Siverge-Network, DV team leader at Veriest-V, Cisco Systems, Synopsys and Qualcomm. Extensive experience in VLSI pre- and post-silicon verification, in ramping and managing design verification teams, constraint driven functional verification environments, RTL simulations and CAD.

How Did You Find out About the 2017 Startup Challenge and What Lessons Has Your Team Learned, and Are Learning, While Preparing for Your Presentation?

Ramon Chips has been invited by the LSW organizers to apply and attend.

What Are Ramon Chips' Growth Objectives over the next 5 Years?

Ramon Chips plans to substantially increase its sales to the space industry and exceed 100 m€ in five years. We address both the traditional sector of satellite manufacturers and New Space, mostly telecom constellations.

How Will Winning LSW 2017 Startup Challenge Support These Growth Objectives?

To achieve its objective, Ramon Chips plans to raise investment funds in the near future. The company seeks an investment of 10 m€ and we hope that LSW and the Startup Challenge will expose us to suitable investors.




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